# Pastebin ju6CNfvO
2c2
< 			compatible = "amlogic,meson-g12a-dwmac",
---
> 			compatible = "amlogic,meson-axg-dwmac",
5,6c5,6
< 			reg = <0x0 0xff3f0000 0x0 0x10000>,
< 			      <0x0 0xff634540 0x0 0x8>;
---
> 			reg = <0x0 0xff3f0000 0x0 0x10000
> 			       0x0 0xff634540 0x0 0x8>;
11,18c11,12
< 				 <&clkc CLKID_MPLL2>,
< 				 <&clkc CLKID_FCLK_DIV2>;
< 			clock-names = "stmmaceth", "clkin0", "clkin1",
< 				      "timing-adjustment";
< 			rx-fifo-depth = <4096>;
< 			tx-fifo-depth = <2048>;
< 			resets = <&reset RESET_ETHERNET>;
< 			reset-names = "stmmaceth";
---
> 				 <&clkc CLKID_MPLL2>;
> 			clock-names = "stmmaceth", "clkin0", "clkin1";