# Pastebin hE9t9JwL


+	/* We have 32k crystal, so lets enable it */
+	val = readl(MCU_CTRL_LFXOSC_CTRL);
+	val &= ~(MCU_CTRL_LFXOSC_32K_DISABLE_VAL);
+	writel(val, MCU_CTRL_LFXOSC_CTRL);
+	/* Add any TRIM needed for the crystal here.. */
+	/* Make sure to mux up to take the SoC 32k from the crystal */
+	writel(MCU_CTRL_DEVICE_CLKOUT_LFOSC_SELECT_VAL,
+	       MCU_CTRL_DEVICE_CLKOUT_32K_CTRL);
+
+	/* Setup debounce conf registers - arbitrary values. Times are approx */
+	/* 1.9ms debounce @ 32k */
+	writel(0x1, WKUP_CTRLMMR_DBOUNCE_CFG1);
+	/* 5ms debounce @ 32k */
+	writel(0x5, WKUP_CTRLMMR_DBOUNCE_CFG2);
+	/* 20ms debounce @ 32k */
+	writel(0x14, WKUP_CTRLMMR_DBOUNCE_CFG3);
+	/* 46ms debounce @ 32k */
+	writel(0x18, WKUP_CTRLMMR_DBOUNCE_CFG4);
+	/* 100ms debounce @ 32k */
+	writel(0x1c, WKUP_CTRLMMR_DBOUNCE_CFG5);
+	/* 156ms debounce @ 32k */
+	writel(0x1f, WKUP_CTRLMMR_DBOUNCE_CFG6);