# Pastebin gCLdEYEb
USB Wake-up Control Register (DGO 10) (USB_WAKEUP) 32 RW 0000_0000h
48h PTD Pads Compensation Cell Configuration Register
(PTD_COMPCELL)
32 RW 0000_8000h
4Ch Lower CA35 TS Timer First Compare Value (TSTMR_CMP0_VAL_L) 32 RW 0000_0000h
50h Upper CA35 TS Timer First Compare Value
(TSTMR_CMP0_VAL_H)
32 RW 0000_0000h
54h Lower CA35 TS Timer Second Compare value
(TSTMR_CMP1_VAL_L)
32 RW 0000_0000h
58h Upper CA35 TS Timer Second Compare Value
(TSTMR_CMP1_VAL_H)
32 RW 0000_0000h
5Ch CA35 Core0 Reset Vector Base Address (DGO 8) (RVBARADDR0) 32 RW 0000_1000h
60h CA35 Core1 Reset Vector Base Address (DGO 9) (RVBARADDR1) 32 RW 0000_1000h
64h Medium Quality Sound Configuration Register (MQS1_CF)