# Pastebin Z2qK0WhZ
diff --git a/litex/soc/cores/gpio.py b/litex/soc/cores/gpio.py
index 5474a4ce..41b5dc8e 100644
--- a/litex/soc/cores/gpio.py
+++ b/litex/soc/cores/gpio.py
@@ -39,6 +39,7 @@ class GPIOIn(Module, AutoCSR):
         self.specials += MultiReg(pads, self._in.status)
         if with_irq:
             self.submodules.irq = _GPIOIRQ(self._in.status)
+            self.ev = self.irq.ev
 
 # GPIO Output --------------------------------------------------------------------------------------